A padstack is a set of information that defines the physical structure and electrical connectivity of a pin or via (the region in which a component pin connects to a layout or a connection between layers). A padstack includes information about the layers involved in making the connection, on the size and shape of the layout area to the type and dimensions of the accompanying hole. Padstack definitions are stored in library files with an extension of .pslb.
The Electronics Desktop Padstack Editor supports the viewing, modification, and saving of padstack definition information for physical structure and connectivity. After modifying a padstack definition, the information can then be used to define a via or pin. Padstack definitions can be exported to library files.
To open the Padstack Editor, load a project and select Tools > Edit Libraries > Padstacks. When the Edit Libraries window opens, use its controls to open the Padstack Editor.