The following references were consulted when creating this example problem:
Zhang, B., Ding H., & Sheng, X. (2008). Modal analysis of board-level electronic package. Microelectronic Engineering. 85, 610-620.
Lee, Y., Wang, B., Lai, Y., Yeh, C., & Chen, R. (2008). Finite element model verification for packaged printed circuit board by experimental modal analysis. Microelectronics Reliability. 48, 1837-1846.