In this tutorial, you have:
Imported the CTM-based, temperature-dependent chip power map onto the IC package die
Setup, meshed, and solved the Icepak model as a standard Icepak project
Postprocessed the Icepak chip-aware model
Viewed temperature profile on the chip power map
Viewed heat transfer coefficients on the IC package boundary
Exported the system-level thermal information for chip-level thermal analysis
Chip-Package-System (CPS) thermal analysis using Ansys Icepak is important:
Chip-level thermal simulation is coupled to the system level thermal environment (Icepak)
Provides more accurate chip-level thermal results (i.e. system aware chip design) compared to using assumed environment conditions
For example, averaged and/or assumed htc on the package boundary, or uniform and/or assumed die temperature
Provides more accurate system-level thermal results (i.e. chip-aware system thermal design)
Provides convenient, straight-forward method to accurately identify hot spots in chip and package
Offers the ability to perform chip/package thermal optimization
Capability of chip-level tool (RH-CTA) to take into account thermal results from Icepak to compute chip-level thermal phenomena offers an unequaled level of accuracy for thermal design of chips and packages