• SYZ and DC solver performance improvement
• Support for multi-die designs in CPA
• Spatially varying temperature profiles in AEDT SIwave simulations
• Enhanced dynamic link between Circuit and SIwave DCIR in AEDT for electrothermal workflow with harmonic loss.
• Validation Check improvements
• Solver input file generation performance improvements
• Layout component export
• HFSS Regions improvements in AEDT
• UI rendering performance optimizations for large designs
• Hierarchical ECAD/ECAD DCIR simulation support (Beta)