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Chip-Package-System (CPS) methodology in SIwave combines the Integrated Circuit (IC) model or chip, the packages that contain the chips, and the printed circuit board (PCB) into a single system for simulation. The CPS process flow includes both design and analysis activities.

Design activities include:

Analysis activities include:

Click any activity in the CPS Process Flow diagram below for more information.

CPS Process Flow - Click an Activity for More Information

PCB Design Quick Links Package Design Quick Links IC Design Quick Links System Design Quick Links Running a Simulation Running a Simulation - Cosimulation Export 3D Models Exporting a Sentinel SSO Netlist SIwave Getting Started Guides ALinks Modeling in SIwave Export 3D Models Creating Reports EM Extraction Computing SYZ Parameters Computing DC Simulations Computing Near Fields (EMI) Running the PI Advisor HFSS 3D Layout Simulations PSI SYZ AC Current Simulations Signal Net Analyzer Scripting in SIwave