Generate Spec. IBIS-AMI model: Architecture Tab

From the Architecture tab, choose model generation sub-stages by adding, reordering, and/or removing sub-stages, and customizing the parameters of each sub-stage, as before.

Generate Spec. IBIS AMI model window, architecture tab.

Model Name

Description

Notes

AFE

Analog Front End

PX: Pulse Shaping. Shape digital input to output with slew rates.

RX: Apply input impedance + CComp Load to RX input.

TX: [PX]+ Output Impedance + CComp load after TX output.

FFE

Feed Forward Equalizer

Finite Impulse Response based filter.

Calculate tap coefficients (unit-less) based on spec.

Normalized: Sum(abs(Ci)=1) , Ci includes main cursor.

An Rx model that takes a forwarded clock signal of type "Times" will output (return) the same clock times it received. These settings can be enabled in the Reserved Parm tab. Models that take a forwarded clock signal of type "Wave" will not output clock times.

AGC

Automatic Gain Controller

Adjust gain such that amplitude ~= reference value.

Attack rate/ Decay rate specify how fast to adjust the gain.

VCO

Voltage Control Oscillator

: Waveform function (sin, square, etc)

: Fundamental frequency

: Initial Phase

: Scaling constant

DSP

Digital Signal Processing

Various digital filters based on DSP algorithms

LP: Low Pass, HP: High Pass, BP: Band Pass, BG: Band Gap

LS: Low Shelf, HS: High Shelf, BS: Band Shelf

CTLE

Continuous Time Linear Equalizer

Parameter controlled or frequency response csv file.

Real/Imag, Mag/Deg, or DB/Deg for column headers.

Model will sample uniformly for given csv data.

An Rx model that takes a forwarded clock signal of type "Times" will output (return) the same clock times it received. These settings can be enabled in the Reserved Parm tab. Models that take a forwarded clock signal of type "Wave" will not output clock times.

DFE

Decision Feedback Equalizer Clock Data Recovery

Post-cursor with adaptation will be applied to current input

Bang-bang phase detector is used for clock sampling.

Slicer will take modulation scheme into account.

PTH

Pass Through

Scale inputs to outputs with optional gain and DC-offset.

User can specify a fixed offset and gain, y' = (y-offset)*gain.

Or auto calculate scale and offset to clamp output ranges (bit-by-bit). This is useful to convert single-ended signals to differential ones.

Inverse clamp can restore back to single-ended signals.

An Rx model that takes a forwarded clock signal of type "Times" will output (return) the same clock times it received. These settings can be enabled in the Reserved Parm tab. Models that take a forwarded clock signal of type "Wave" will not output clock times.

SPICE

SSolver/NGSpice

User's SSolver/NGSpice compatible .subckt definitions.

Terminals are two inputs followed by two outputs. Assuming High-Z.

Support parameters override.

Simulator built-in, in this model.

PROXY

Script based proxy model

User's Matlab, Python, C models as a .dll/.so, or executable without AMI compilation.

License to make direct C-Python call for optimum performance.

Note, currently, proxy AMI model does not work with other modules.

Related Topics:

SPISim