Adding Terminal, Quantity, or Signal Ports to an Entity Description

1. Select the desired port type (Terminal, Quantity, or Signal) from the VHDL Model Editor > Edit Entity menu. The Edit Model dialog box opens with the selected port type highlighted.
   Note:

   You can choose the port type in the Edit Model dialog box by selecting the desired item in the Entity tree. The data entry pane to the right of the tree changes to reflect the selection.

2. Select a model from the Model field.
3. Click to add a new row to the list in the Port field. If this is the first time you have visited this field for a new model, the list will be empty.
   1. Type a name for the new port in the Name field.
   2. For Quantity or Signal ports, select a direction for the new port from the list available in the Direction field: in, out, or inout.
   3. For Terminal ports, select one of the natures supported by VHDL-AMS from the list available in the Nature field. For Quantity or Signal ports, select a type in the Type field. These lists contain a number of physical, numerical, and logical types (for example, voltage, real, bit).
   4. If applicable, type a default value for the port in the Value field.
   5. Optionally, add a description for the port in the Description field.
4. Repeat Steps 1 through 3 as needed for additional ports.
5. Click OK when finished to close the dialog box.

The editor generates the VHDL-AMS code for the specified ports and adds it to the model code in the editor window. Syntax is checked and errors displayed in the Message Manager pane.