Glossary

This section defines the terminology used in the Ansys desktop help topics. Terms are listed in alphabetical order.

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

Q

R

S

T

U

V

W

X

Y

Z

 

Glossary: A

 

A/D

See Analog-to-Digital.

ACPR

Adjacent channel power ratio.

Active Substrate

A hybrid or multichip module substrate formed from a semiconductor. Termed active because components such as transistors can be fabricated directly into the substrate.

Active Trimming

The process of trimming components such as resistors while the circuit is under power. Such components are fabricated directly onto the substrate of a hybrid or multichip module, and the trimming is usually performed using a laser beam.

Active-High

A signal whose active state is considered to be a logic 1.

Active-Low

A signal whose active state is considered to be a logic 0.

Actuator

A transducer that converts an electronic signal into a physical equivalent. For example, a loudspeaker is an actuator which converts electronic signals into corresponding sounds.

Adaptive Hardware

Refers to devices which allow new design variations to be "compiles" in real-time, which may be thought of as dynamically creating subroutines in hardware (see also Virtual Hardware and Cache Logic).

Additive Process

A process in which conducting material is added to specific areas of a substrate. Groups of tracks, individual tracks, or portions of tracks can be built up to precise thicknesses by iterating the process multiple times with selective masking.

Address Bus

A unidirectional set of signals used by a computer to point to memory locations in which it is interested.

Analog

A continuous value that most closely resembles the real world and can be as precise as the measuring technique allows.

Analog Circuit

A collection of components used to generate or process analog signals.

Analog-to-Digital (A/D)

The process of converting an analog value into its digital equivalent.

Anisotropic Adhesive

Special adhesives which contain minute particles of conductive material. These adhesives find particular application with the flipped-chip techniques used to mount bare die on the substrates of hybrids, multichip modules, or circuit boards. The conducting particles are only brought in contact with each other at the sites where the raised pads on the die are pressed down over their corresponding pads on the substrate, thereby forming good electrical connections between the pads.

Anti-Fuse Technology

A programmable logic device technology in which conducting paths (anti-fuses) are grown by applying signals of relatively high voltage and current to the device's inputs.

Anti-Pad

The area of copper etched away around a via or a plated through-hole on a power or negative signal plane, thereby preventing an electrical connection being made to that plane.

Application-Specific Integrated Circuit (ASIC)

A device whose function is determined for a particular application or group of applications.

Application-Specific Standard Part (ASSP)

Refers to an integrated circuit created by a device manufacturer using ASIC technologies, and for these components to be sold as standard parts to anybody who wants to buy them.

ASIC

See Application-Specific Integrated Circuit.

ASIC Cell

A logic function in the cell library defined by the manufacturer of an application-specific integrated circuit.

Assertion-Level Logic

Special symbols which are used to more precisely indicate the function of gates with active-low inputs.

ASSP

See Application-Specific Standard Part.

Asynchronous

A signal whose data is acknowledged or acted upon immediately, irrespective of any clock signal.

Atto

Unit qualifier (symbol = a) representing one millionth of one millionth of one millionth, or 10-18. For example, 3aS stands for 3 x 10-18 seconds.

Attenuator

A passive device used to reduce signal strength while maintaining proper input and output impedance.

Glossary: B

 

Backplane

The medium used to interconnect a number of circuit boards. Typically refers to a special, heavy-duty printed or discrete wired circuit board.

Ball Grid Array (BGA)

A packaging technology similar to a pad grid array, in which a device's external connections are arranged as an array of conducting pads on the base of the package. However, in the case of a ball grid array, small balls of solder are attached to the conducting pads.

Bandpass

The frequency limits between half-power points of a signal or filter.

Bare Die

An unpackaged integrated circuit.

Base

Refers to the number of digits in a numbering system. For example, the decimal numbering system is said to be base-10. May also be referred to as the "radix".

Basic Cell

A pre-defined group of unconnected components that is replicated across the surface of a gate array.

BER

Bit error rate.

BGA

See Ball Grid Array.

BiCMOS

A technology in which the function of each logic gate is implemented using low-power CMOS, while the output stage is implemented using high-drive bipolar transistors

Binary Encoding

A form of state assignment for state machines that requires the minimum number of state variables.

BiNMOS

A relatively new low-voltage integrated circuit technology in which complex combinations of bipolar and NMOS transistors are used to form sophisticated output stages providing both high speed and low static power dissipation.

Bi-quinary

A system which utilizes two bases, base-2 and base-5, to represent decimal numbers. Each decimal digit is represented by the sum of two parts, one of which has the value of decimal zero or five, and the other the values of zero through four. The abacus is one practical example of the use of a bi-quinary system.

Bit

Abbreviation of binary digit.

Bipolar Junction Transistor (BJT)

A family of transistors.

Blackbox

Same as N-Port.

Blind Via

A via that is only visible from one side of the substrate.

Bobble

A small circle used on the inputs to a logic gate symbol to indicate an active-low input or control, or on the outputs to indicate a negation (inversion) or a complementary signal. Some engineers prefer to use the term bubble.

Bounce Pad

A special pattern etched onto the power or negative signal plane of a microwire circuit board to be used in conjunction with a laser beam which is employed to create blind vias. The laser beam evaporates the epoxy forming the outer layers of the board and continues down to the bounce pad which reflects, or bounces, it back up, thereby terminating the via.

Braze

To unite or fuse two pieces of metal by heating, or with a hard solder with a high melting point.

Bulk Storage

Refers to some form of media, typically magnetic, such as tape or a disk drive which can be used to store large quantities of information relatively inexpensively.

Buried Via

A via used to link conducting layers internal to a substrate. Such a via is not visible from either side of the substrate.

Bundle

A set of signals related in some way that makes it appropriate to group them together for ease of representation or manipulation. May contain both scalar and vector elements; for example, {a,b,c,d[5:0]}.

Bus

A set of signals performing a common function and carrying similar data. Typically represented using vector notation; for example, address[7:0].

Byte

A group of eight binary digits, or bits.

Glossary: C

 

Capacitance

A measure of the ability of two adjacent conductors separated by an insulator to hold a charge when a voltage differential is applied between them. Capacitance is measured in units of Farads.

CDMA

Code division multiple access.

Cell Library

The collective name for the set of logic functions defined by the manufacturer of an application-specific integrated circuit. The designer decides which types of cells should be realized and connected together to make the device perform its desired function.

Ceramic

An inorganic, nonmetallic material, such as alumina, beryllia, steatite, or forsterite, which is fired at a high temperature and is often used in electronics as a substrate or to create component packages.

CGA

See Column Grid Array.

Channel

(1)The area between two arrays of basic cells in a channeled gate array.

(2)The gap between the source and drain regions in a MOS transistor.

Channeled Gate Array

Application-specific integrated circuit organized as arrays of basic cells. The areas between the arrays are known as channels.

Channel-Less Gate Array

Application-specific integrated circuit organized as a single large array of basic cells. May also be referred to as a "sea of cells" or a "sea of gates" device.

Checksum

The final cyclic-redundancy-check value stored in a linear feedback shift register (or software equivalent). Also known as a "signature" in the guided-probe variant of functional test.

Chip

Popular name for an integrated circuit.

Chip-On-Board (COB)

A process in which unpackaged integrated circuits are physically and electrically attached to a circuit board, and are then encapsulated with a "glob" of protective material such as epoxy.

Chip-On-Chip (COC)

A process in which unpackaged integrated circuits are mounted on top of each other. Each die is very thin and it is possible to have over a hundred dies forming a 3D cube.

Chip-On-Flex (COF)

Similar to chip-on-board (COC), except that the unpackaged integrated circuits are attached to a flexible printed circuit.

Circuit Board

The generic name for a wide variety of interconnection techniques, which include rigid, flexible, and rigid-flex boards in single-sided, double-sided, multilayer, and discrete wired configurations.

CMOS

Logic gates constructed using both NMOS and PMOS transistors connected in a complementary manner.

Coaxial Cable

A conductor in the form of a central wire surrounded first by a dielectric (insulating) layer, and then by a conducting tube which serves to shield the central wire from external interference.

Coefficient of Thermal Expansion

Defines the amount a material expands and contracts due to changes in temperature. If materials with different coefficients of thermal expansion are bonded together, changes in temperature will cause shear forces at the interface between them.

Cofired Ceramic

A substrate formed from multiple layers of "green" ceramic that are bonded together and fired at the same time.

Column Grid Array (CGA)

A packaging technology similar to a pad grid array, in which a device's external connections are arranged as an array of conducting pads on the base of the package. However, in the case of a column grid array, small columns of solder are attached to the conducting pads.

Combinatorial

A digital function whose output value is directly related to the current combination of values on its inputs. Also known as combinational.

Compiled Cell Technology

A technique used to create portions of a standard cell application-specific integrated circuit. The masks used to create components and interconnections are directly generated from Boolean representations using a silicon compiler. May also be used to create data-path functions and memory functions.

Complementary Output

Refers to a function with two outputs carrying complementary logical values. One output is referred to as the true output and the other as the complementary output.

Complex Programmable Logic Device (CPLD)

A device that contains a number of PLA or PAL functions sharing a common programmable interconnection matrix.

Component

Components are items placed on schematics and layouts to represent electrical elements and sub circuits. The component information defines a signal-processing function or source, or secondarily a data source, data channel, or similar entity. Components have pins for connections, bitmaps in the project tree, and properties for simulation. The information that constitutes a component includes its component chooser bitmap, schematic symbol, layout footprint, pin properties, parameters and parameter values, and netlist string definition. A component can be associated with more than one simulation if it can be analyzed in more than one simulator.

Computer-Generated Hologram (CGH)

Refers to a slice of quartz or similar material into which three-dimensional patterns are cut using a laser. The angles of the patterns cut into the quartz are precisely calculated for use in the optical communication strategy known as holographic interconnect. All of these calculations are performed by a computer, and the laser used to cut the three-dimensional patterns into the quartz is also controlled by a computer. Thus, the slice of quartz is referred to a computer-generated hologram.

Conductive Ink Technology

A technique in which tracks are screen printed directly onto the surface of a circuit board using a conductive ink.

Configurable Hardware

A product whose function may be customized once or a very few times (see also Reconfigurable Hardware, Remotely Reconfigurable Hardware, Dynamically Reconfigurable Hardware, and Virtual Hardware).

Conjunction

Propositions combined with an AND operator; for example, "You have a parrot on your head AND you have a fish in your ear." The result of a conjunction is true if all the propositions comprising that conjunction are true.

Conversion Loss

The ratio in dB of the IF output of a mixer to the RF input power. All conversion loss measurements and specification are normally based on the mixer being terminated on all ports and a stated LO signal power level being applied.

Cost Function

In an optimization setup, a cost function is based on goal values specified for at least one solution quantity. Optimetrics changes the design parameter values to fulfill the cost function.

CPLD

See Complex Programmable Logic Device.

CRC

See Cyclic Redundancy Check.

CSIC

See Customer-Specific Integrated Circuit.

Customer-Specific Integrated Circuit (CSIC)

An alternative and possibly more accurate name for an ASIC, but this term is rarely used in the industry and shows little indication of finding favor with the masses.

Chemical Vapor Deposition (CVD)

A process for growing thin films on a substrate, in which a gas containing the required molecules is converted into a plasma by heating it to extremely high temperatures using microwaves. The plasma carries atoms to the surface of the substrate where they are attracted to the crystalline structure of the substrate. This underlying structure acts as a template. The new atoms continue to develop the structure to build up a layer on the substrate's surface.

Chemical Vapor Infiltration (CVI)

A process similar to chemical vapor deposition (CVD) but, in this case, the process commences by placing a crystalline powder of the required substance in a mold. Additionally, thin posts, or columns, can be pre-formed in the mold, and the powder can be deposited around them. When exposed to the same plasma as used in the CVD technique, the powder coalesces into a polycrystalline mass. After the CVI process has been performed, the posts can be dissolved leaving holes through the crystal for use in creating vias. CVI processes can produce layers twice the thickness of those obtained using CVD techniques at a fraction of the cost.

CW

Continuous wave; refers to an unmodulated sine-wave signal.

Cyclic Redundancy Check (CRC)

A calculation used to detect errors in data communications, typically performed using a linear feedback shift register. Similar calculations may be used for a variety of other purposes such as data compression.

Glossary: D

 

D/A

See Digital-to-Analog.

Data Bus

A bi-directional set of signals used by a computer to convey information from a memory location to the central processing unit and vice versa. More generally, a set of signals used to convey data between digital functions.

Data-Path Function

A well-defined function such as an adder, counter, or multiplier used to process digital data.

dBm

Power level relative to 1mV rms.

DC Balance

Stream of data encoded to ensure an equal balance of 1 or 0 . 8b10b encoding has been developed to ensure DC balancing.

DC Coupling

A method of coupling two different circuits together, allowing them to share both the static DC and varying AC characteristics of a signal.

Decoder (digital)

A logic function that uses a binary value, or address, to select between a number of outputs and to assert the selected output by placing it in its active state.

Deep Sub-Micron

Typically taken to refer to integrated circuits containing structures which are smaller than 0.5 microns.

DeMorgan Transformation

The transformation of a Boolean expression into an alternate, and often more convenient, form.

Design

Designs are the building blocks of projects, and can be Circuit designs or 3D planar EM models. Designs consist of schematics or geometrical models, model data, solution setup information, output graphs and tables, and other pieces of information that go into describing simulation of electrical circuits. A design is the largest single simulatable entity in a project.

Design Variation

A single combination of variable values that is solved during a parametric or optimization setup.

Device

A discrete, separate electrical entity such as a diode, a capacitor or a packaged transistor.

Die

(1)An unpackaged integrated circuit. In this case, the plural of die is also die (in much the same way that "a shoal of herring" is the plural of "herring"). (2)A piece of metal with a design engraved or embossed on it for stamping onto another material, upon which the design appears in relief.

Die Separation

The process of separating individual die from the wafer by marking the wafer with a diamond scribe and fracturing it along the scribed lines.

Die Stacking

A technique used in specialist applications in which several bare die are stacked on top of each other to form a sandwich. The die are connected together and then packaged as a single entity.

Dielectric Layer

(1) An insulating layer used to separate two signal layers.

(2) An insulating layer used to modify the electrical characteristics of an MCM-D substrate.

Diffusion Layer

The surface layer of a piece of semiconductor into which impurities are diffused to form P-type and N-type material. In addition to forming components, the diffusion layer may also be used to create embedded traces.

Digital

A value represented as being in one of a finite number of discrete states called quanta. The accuracy of a digital value is dependent on the number of quanta used to represent it.

Digital Circuit

A collection of logic gates used to process or generate digital signals.

Digital Signal Processor (DSP)

A primarily digital component used to process either digital or analog signals. In the case of the latter, the signal may first be conditioned, then converted into a digital equivalent using an analog-to-digital (A/D) converter function. The signal conditioning and A/D functions may either be external to the DSP or resident in the device. A typical DSP application might be the compression/decompression of video data.

Digital-to-Analog (D/A)

The process of converting a digital value into its analog equivalent.

Diode

A two-terminal device that only conducts electricity in one direction; in the other direction it behaves like an open switch. The term diode is typically taken to refer to a semiconductor device, although alternative implementations such as vacuum tubes are available.

Diode-Transistor Logic (DTL)

Logic gates implemented using particular configurations of diodes and bipolar junction transistors. For the majority of today's designers, diode-transistor logic is of historical interest only.

Discrete Device

Typically taken to refer to an electronic component such as a resistor, capacitor, diode, or transistor that is presented in an individual package. More rarely, the term may be used in connection with a simple integrated circuit containing a small number of primitive gates.

Discrete Wire Board (DWB)

A form of circuit board in which a special computer-controlled wiring machine ultrasonically bonds extremely fine insulated wires into the surface layer of the board. This discipline has enjoyed only limited recognition, but may be poised to emerge as the technology-of-choice for high-speed designers.

Discrete Wire Technology

The technology used to fabricate discrete wire boards.

Doping

The process of inserting selected impurities into a semiconductor to create P-type or N-type material.

Double-Sided

A printed circuit board with tracks on both sides

DPSK

Differential phase-shift keying.

DQPSK

Differential quadrature phase-shift keying.

DRAM

See Dynamic RAM.

DSP

See Digital Signal Processor.

DTL

See Diode-Transistor Logic.

DUT

Device under test.

Dynamic Flex

A type of flexible printed circuit which is used in applications that are required to undergo constant flexing such as ribbon cables in printers.

Dynamic RAM (DRAM)

A memory device in which each cell is formed from a transistor-capacitor pair. Called dynamic because the capacitor loses its charge over time, and each cell must be periodically recharged if it is to retain its data.

Glossary: E

 

E2PROM

See electrically Erasable Programmable Read-Only Memory.

EBE

See Electron Beam Epitaxy.

ECL

See Emitter-Coupled Logic.

Edge port

A place in a layout or footprint geometry through which excitation signals enter and leave the structure.

Edge-Sensitive

An input that only affects a function when it transitions from one logic value to another.

EEPROM

See electrically Erasable Programmable Read-Only Memory.

electrically Erasable Programmable Read-Only Memory (EEPROM or E2PROM)

A memory device whose contents can be electrically programmed by the designer. Additionally, the contents can be electrically erased allowing the device to be reprogrammed. Also known as EEPROM and E2PROM.

Electromigration

(1)A process in which structures on an integrated circuit's substrate are eroded by the flow of electrons in much the same way as land is eroded by a river (also known as subatomic erosion). (2)The process of forming transistor-like regions in a semiconductor using an intense magnetic field.

Electron Beam Epitaxy (EBE)

A technique for creating thin films on substrates in precise patterns, in which the substrate is first coated with a layer of dopant material before being placed in a high vacuum. A guided beam of electrons is fired at the substrate causing the dopant to be driven into it, effectively allowing molecular-thin layers to be "painted" onto the substrate where required.

Electron Beam Lithography

An integrated circuit fabrication process in which fine beams of electrons are used to draw extremely high-resolution patterns directly into the resist without the use of a mask.

Electro-Static Discharge (ESD)

The process of moving around can generate static electricity. The term electro-static discharge refers to a charged person, or object, discharging static electricity. Although the current associated with such a static charge is low, the electric potential can be in the millions of volts and can severely damage electronic components. CMOS devices are particularly prone to damage from static electricity.

EM

Electromagnetic.

Emitter-Coupled Logic (ECL)

Logic gates implemented using particular configurations of bipolar junction transistors.

Enzyme

One of numerous complex proteins which are produced by living cells and catalyze biochemical reactions at body temperatures.

EPROM

See Erasable Programmable Read-Only Memory.

Equivalent Gate

A concept in which each type of logic function is assigned an equivalent gate value for the purposes of comparing functions and devices. However, the definition of an equivalent gate varies depending on who you're talking to.

Equivalent Integrated Circuit

A concept used to compare the component density supported by diverse interconnection technologies such as circuit boards, hybrids, and multichip modules

Erasable Programmable Read-Only Memory (EPROM)

A memory device whose contents can be electrically programmed by the designer. Additionally, the contents can be erased by exposing the die to ultraviolet light through a quartz window mounted in the top of the component's package.

ESD

See Electro-Static Discharge.

Etching

The process of selectively removing any material not protected by a resist using an appropriate solvent or acid. In some cases the unwanted material is removed using an electrolytic process.

Eutectic Bond

A bond formed when two pieces of metal, or metal-coated materials, are pressed together and vibrated at ultrasonic frequencies.

Euler Angles

Euler angles are used in Ansoft software to carry out a coordinate transformation from one coordinate system to another. The Swiss mathematician and physicist Leonhard Euler first developed the classical rotation theorem to describe rotations in 3D space. The angles used are Euler angles and can be used to describe any 3D rotation. These angles, given by (ö, è, ø) represent a series of sequential rotations about two axis of the coordinate system. The first rotation (ö) represents a rotation about the Z-axis of the source coordinate system (X, Y, Z) which results in an intermediate coordinate system denoted by (X'', Y'', Z''). The second rotation (è) represents a rotation of the intermediate coordinate system about the X''-axis, again resulting in an intermediate coordinate system denoted by (X', Y', Z'). The third and final rotation (ø) represents a rotation about the Z'-axis of the intermediate coordinate system. The final rotation completes the rotation and results in the "target" coordinate system denoted (X, Y, Z).

For further information see, Eric W. Weisstein, "Euler Angles." From MathWorld - A Wolfram Web Resource.

http://mathworld.wolfram.com/EulerAngles.html .

Eye Diagram

Eye diagrams are commonly used to analyze signal integrity issues with communications channels. The bits are superimposed at unit intervals representing the duration of each bit.

Eye Mask

The size of the eye opening in the center of an eye diagram indicates the amount of voltage and timing margin available to sample this signal. Thus, for a particular electrical interface, a fixed reticule or window could be placed over the eye diagram showing how the actual signal compares to minimum criteria window, know as the eye mask. If a margin rectangle with width equal to the required timing margin and height equal to the required voltage margin fits into the opening, then the signal has adequate margins. Voltage margin can often be traded off for timing margin.

Glossary: F

 

Fan-Out Via

In the case of surface mount devices attached to double-sided or multilayer boards, each component pad is usually connected by a short length of track to a via which forms a link to other conducting layers, and this via is known as a fan-out via. The term fan-out via is generally also taken to include any vias that fall inside the device's footprint (under the body of the device). Some designers attempt to differentiate these vias from those that fall outside the device's footprint by referring to them as fan-in vias, but this is not an industry-standard term.

Falling-Edge

A transition from a logic 1 to a logic 0. Also known as a negative edge.

Falltime

The time it takes for a waveform to transition from the high logic state to the low logic state. Falltime is usually measured from 90% of the total signal swing to 10% of the signal swing.

Fan-In and Fan-Out Vias

In the case of surface mount devices attached to double-sided or multilayer boards, each component pad is usually connected by a short length of track to a via which forms a link to other conducting layers, and this via is known as a fan-out via. The term fan-out via is generally also taken to include any vias that fall inside the device’s footprint (under the body of the device). Some designers attempt to differentiate these vias from those that fall outside the device’s footprint by referring to them as fan-in vias, but this is not an industry-standard term.

Femto

Unit qualifier (symbol = f) representing one thousandth of one millionth of one millionth, or 10-15. For example, 3fS stands for 3 x 10-15 seconds.

FET

See Field-Effect Transistor.

Field-Effect Transistor (FET)

A transistor whose control, or gate, signal creates an electro-magnetic field which turns the transistor ON or OFF.

Field-Programmable Gate Array (FPGA)

A programmable logic device which is more versatile than traditional programmable devices such as PALs and PLAs, but less versatile than an application-specific integrated circuit. Some field-programmable gate arrays use fuses such as those found in programmable logic devices, but others are based on SRAM equivalents.

Field-Programmable Interconnect Chip (FPIC)

An alternative, proprietary name for a field-programmable interconnect device (FPID).

Field-Programmable Interconnect Device (FPID)

A device which is used to connect logic devices together, and which can be dynamically reconfigured in the same way as standard SRAM-based FPGAs. Because each FPID may have around 1,000 pins, only a few such devices are typically required on a circuit board.

Filter

Filters are used to block out undesired frequencies. There are two types of filters: band pass and rejection. A band pass filter permits only the desired range to pass through, while the rejection filter attenuates an undesired range of frequencies.

Firmware

Refers to programs, or sequences of instructions, that are hard-coded into non-volatile memory devices.

First-In First Out (FIFO)

A memory device in which data is read out in the same order that it was written in.

Flash (e.g., Gold Flash)

An extremely thin layer of gold with a thickness measured on the molecular level which is either electroplated or chemically plated onto a surface.

FLASH Memory

An evolutionary technology that combines the best features of the EPROM and E2PROM technologies. The name FLASH is derived from the technology's fast reprogramming time compared to EPROM.

Flex

See Flexible Printed Circuit.

Flexible Printed Circuit (FPC or Flex)

A specialist circuit board technology, often abbreviated to "flex", in which tracks are printed onto flexible materials. There are a number of flavors of flex, including static flex, dynamic flex, and rigid flex.

Flipped Chip

A generic name for processes in which unpackaged integrated circuits are mounted directly onto a substrate with their component-sides facing the substrate.

Flipped TAB

A combination of flipped chip and tape automated bonding.

Footprint

The area occupied by a device mounted on a substrate.

Fourier Analysis

A mathematical procedure used to determine the collection of sine waves (differing in frequency and amplitude) that is necessary to make up the square-wave pattern under consideration.

FPC

See Flexible Printed Circuit.

FPGA

See Field-Programmable Gate Array.

FPIC

See Field-Programmable Interconnect Chip.

FPID

See Field-Programmable Interconnect Device.

FR4

The most commonly used insulating base material for circuit boards. FR4 is made from woven glass fibers which are bonded together with an epoxy. The board is cured using a combination of temperature and pressure which causes the glass fibers to melt and bond together, thereby giving the board strength and rigidity. The first two characters stand for "Flame Retardant". FR4 is technically a form of fiberglass, and some people do refer to these composites as fiberglass boards or fiberglass substrates, but not often.

Free-Space Optical Interconnect

A form of optical interconnect in which laser-diode transmitters communicate directly with photo-transistor receivers without employing optical fibers or optical waveguides.

Full Custom

An application-specific integrated circuit in which the designer has complete control over every mask layer used to fabricate the device. The manufacturer does not provide a cell library or pre-fabricate any components on the substrate.

Functional Latency

Refers to the fact that, at any given time, only a portion of the logic functions in a device or system are typically active (doing anything useful).

Functional Test

A test strategy in which signals are applied to a circuit's inputs, and the resulting signals which are observed on the circuit's outputs are compared to known good values.

Fuse

See Fusible-Link Technology.

Fusible-Link Technology (Fuse)

A programmable logic device technology which employs links called fuses. Individual fuses can be removed by applying pulses of relatively high voltage and current to the device's inputs.

Fuzz-Button

A small ball of fibrous gold used in one technique for attaching components such as multichip modules to circuit boards. Fuzz-buttons are inserted between the pads on the base of the package and their corresponding pads on the board. When the package is forced against the board, the fuzz-buttons compress to form good electrical connections. Even when the pressure is removed, the fuzz-buttons act in a similar manner to Velcro and continue to hold the component in place. One of the main advantages of the fuzz-button approach is that it allows broken devices to be quickly removed and replaced. Even though fuzz-button technology would appear to be inherently unreliable, it is used in such devices as missiles, so one can only assume that it is fairly robust.

Glossary: G

 

Gain

The ratio of the power output to the power input of the amplifier in dB. The gain is specified in the linear operating range of the amplifier where a 1 dB increase in input power gives rise to a 1 dB increase in output power. Gain = 20*log(S21)

Gate Array

An application-specific integrated circuit in which the manufacturer pre-fabricates devices containing arrays of unconnected components organized in groups called basic cells. The designer specifies the function of the device in terms of cells from the cell library and the connections between them, and the manufacturer then generates the masks used to create the metallization layers.

Glue Logic

Simple logic gates used to interface more complex functions together.

Gold Flash

An extremely thin layer of gold with a thickness measured on the molecular level which is either electroplated or chemically plated onto a surface.

Goal

In an optimization setup, a goal is the value of a solution quantity that you want to be achieved during the optimization. A goal is represented as one row in the cost function table. Each cost function defined in an optimization setup must include at least one goal.

Gray Code

A sequence of binary values in which each pair of adjacent values differs by only a single bit; for example, 00, 01, 11, 10.

Green Ceramic

Unfired, malleable ceramic.

Ground Bounce

Momentary noise on the device negative signal plane causing a 0 signal to erroneously be seen as a 1. Ground bounce is caused by simultaneously switching outputs (SSO).

Guard Condition

A Boolean expression associated with a state transition in a state diagram or state table. The expression must be satisfied for that state transition to be executed.

Guided Probe

A form of functional test in which the operator is guided in the probing of a circuit to isolate a faulty component or track.

Guided-Wave

A form of optical interconnect, in which optical waveguides are fabricated directly on the substrate of a multichip module. These waveguides can be created using variations on standard opto-lithographic thin-film processes.

Glossary: H

 

Hard Macro (Macro Cell)

A logic function defined by the manufacturer of an application-specific integrated circuit. The function is described in terms of the simple functions provided in the cell library and the connections between them. The manufacturer also defines how the cells forming the macro will be assigned to basic cells and the routing of tracks between the basic cells.

Hardware

Generally understood to refer to any of the physical portions constituting an electronic system, including components, circuit boards, power supplies, cabinets, and monitors.

Harmonic

Integer multiples of the fundamental frequency of interest commonly produced by a non-linear amplifier.

Harmonic Balance

A frequency domain analysis technique for simulating nonlinear circuits and systems. This method assumes the input stimulus consists of a relatively few steady state sinusoids. Therefore the solution can be expressed as a sum of steady state sinusoids that includes the input frequencies in addition to any significant harmonics or mixing terms. A circuit with a single input source will require a single tone HB simulation. The harmonic balance simulation is ideal for situations where transient simulation methods are problematic, such as:

Harmonic balance methods, therefore, are the best choice for most microwave circuits excited with sinusoidal signals (e.g., mixers, power amplifiers).

Harmonic Tuning

Impedance-matching at the harmonic frequencies for enhanced performance and efficiency.

Hertz (Hz)

Unit of frequency. One Hertz equals one cycle, or one oscillation, per second.

Heterojunction

The interface between two regions of dissimilar semiconductor materials. The interface of a hetrojunction has naturally occurring electric fields which can be used to accelerate electrons, and transistors created using hetrojunctions can switch much faster than their counterparts of the same size.

Hexadecimal

Base-16 numbering system. Each hexadecimal digit can be directly mapped onto four binary digits, or bits.

High Impedance State

The state on a signal that is not being driven by any value. A high-impedance state is indicated by the character Z.

Holographic Interconnect

A form of optical interconnect based on a thin slice of quartz, into which three-dimensional images are cut using a laser beam. Thus, the quartz is referred to as a computer-generated hologram, and this interconnection strategy is referred to as holographic.

Homojunction

An interface between two regions of semiconductor having the same basic composition but opposing types of doping. Homojunctions dominate current processes because they are easier to fabricate than heterojunctions.

Hybrid

An electronic sub-system in which a number of integrated circuits (packaged and/or unpackaged) and discrete components are attached directly to a common substrate. Connections between the components are formed on the surface of the substrate, and some components such as resistors and inductors may be fabricated directly onto the substrate.

Hydrogen Bond

The electrons in a water molecule are not distributed equally, because the oxygen atom is a bigger, more robust fellow which grabs more than its fair share. The end result is that the oxygen atom has an overall negative charge, while the two hydrogen atoms are left feeling somewhat on the positive side. This unequal distribution of charge means that the hydrogen atoms are attracted to anything with a negative bias; for example, the oxygen atom of another water molecule. The resulting bond is known as a hydrogen bond.

Hz

See Hertz.

Glossary: I

 

IBIS

IBIS (I/O Buffer Information Specification) is a standard for electronic behavioral specifications of integrated circuit input/output analog characteristics. The core of an IBIS model is a table of current versus voltage and I/O switching timing information. Xilinx IBIS models contain tables for typical, slow/MIN (weak transistors, high temperature, low voltage) and fast/MAX (strong transistors, low temperature, high voltage) process corners. IBIS models are derived from SPICE simulation results and/or lab measurements. The benefit for IBIS model user is fast and accurate simulation while preserving IC vendors intellectual property (information about circuit and process details).

IC

See Integrated Circuit.

ICR

See In-Circuit Reconfigurable.

Impedance

The resistance to the flow of current caused by resistive, capacitive, or inductive devices (or undesired elements) in a circuit.

Impedance Matching

Function of ensuring that the impedance of the transmitter, the receiver, and the transmission line are identical. Mismatched impedances could result in signal reflections, ringing, overshoot, undershoot, and stairstep waveforms.

Incident Voltage

The user specified voltage at an input.

In-Circuit Reconfigurable (ICR)

An SRAM-based, or similar component which can be dynamically reprogrammed on-the-fly while remaining resident in the system.

Inductance

A property of a conductor that allows is to store energy in a magnetic field which is induced by a current flowing through it. Inductance is measured in units of Henries (the base unit is a Henry).

Insertion Loss

Insertion Loss (dB) is defined as the drop in power as a signal enters an RF component. This value not only includes the reflected incoming signal, but also the attenuation of the component.

In-System Programmable (ISP)

An E2-based, FLASH-based, or similar component which can be reprogrammed while remaining resident on the circuit board.

Integrated Circuit (IC)

A device in which components such as resistors, capacitors, diodes, and transistors are formed on the surface of a single piece of semiconductor.

Ion

A particle formed when an electron is added to, or subtracted from, a neutral atom or group of atoms.

Ion Implantation

A process in which beams of ions are directed at a semiconductor to alter its type and conductivity in certain regions.

Isolation

The ratio (expressed in dB) of the power level at one port compared to the resulting power level of the output port.

ISP

See In-System Programmable.

Glossary: J

 

JEDEC

See Joint Electronic Device Engineering Council.

Jitter

The jitter of a periodic signal is the delay between the expected transition of the signal and the actual transition. Jitter is a zero mean random variable. When worst case analysis is undertaken the maximum value of this random variable is used.

Jitter Tolerance

Jitter tolerance is defined as the peak-to-peak amplitude of sinusoidal jitter applied on the input that causes a predefined, acceptable loss at the output. For example jitter applied to the input of an OC-N equipment interface that causes an equivalent 1dB optical power penalty.

Jitter Transfer

Jitter transfer is defined as the ratio of jitter on the output of a device to the jitter applied on the input of the device, versus frequency. Jitter transfer is important in applications where the system is utilized in a loop-timed mode, where the recovered clock is used as the source of the transmit clock.

Joint Electronic Device Engineering Council (JEDEC)

A council which creates, approves, arbitrates, and oversees industry standards for electronic devices. In programmable logic, the term JEDEC refers to a textual file containing information used to program a device. The file format is a JEDEC approved standard and is commonly referred to as a JEDEC file.

Jumper

A small piece of wire used to link two tracks on a circuit board.

Glossary: K

 

Karnaugh Map

A graphical technique for representing a logical function. Karnaugh maps are often useful for the purposes of minimization.

Kelvin Scale of Temperature

A scale of temperature which was invented by the British mathematician and physicist William Thomas, first Baron of Kelvin. Under the Kelvin, or absolute, scale of temperature, 0 K (corresponding to -273oC) is the coldest possible temperature and is known as absolute zero.

Kilo

Unit qualifier (symbol = K) representing one thousand, or 103. For example, 3KHz stands for 3 x 103 Hertz.

Kirchhoff's current law

The sum of all currents entering a node is equal to the sum of all currents leaving the node.

Kirchhoff's voltage law

The directed sum of the electrical potential differences around a circuit must be zero.

 

Glossary: L

 

Laminate

A material constructed from thin layers or sheets. Often used in the substrate of circuit boards.

Large-Scale Integration (LSI)

Refers to the number of logic gates in a device. By one convention, large-scale integration represents a device containing 100 to 999 gates.

Laser Diode

A special semiconductor diode which emits a beam of coherent light.

Last-In First-Out (LIFO)

A memory device in which data is read out in the reverse order to which it was written in.

Latch-Up Condition

A condition in which a circuit draws uncontrolled amounts of current, and certain voltages are forced, or "latched-up", to some level. Particularly relevant in the case of CMOS devices which can latch-up if their operating conditions are violated.

Lateral Thermal Conductivity

Good lateral thermal conductivity means that the heat generated by components mounted on a substrate can be conducted horizontally across the substrate and out through its leads.

Layers (and Stackup)

Layers are used in the layout editor to organize and isolate sets of geometry or other visual indicators. Signal, Negative Signal, and Dielectric are common physical layers, while Symbol (to show component symbols in layout), Error, and Ratsnest (to show connectivity) are non-physical layers. The stackup contains additional properties of the physical layers, such as material, thickness, and elevation. Geometrical information on these layers is used to generate masks for manufacturing.

LDMOS

Laterally diffused metal oxide semiconductor.

Lead

(1) A metallic element (chemical symbol Pb).

(2) A metal conductor used to provide a connection from the inside of a device package to the outside world for soldering or other mounting techniques. Leads are also commonly called pins.

Lead Frame

A metallic frame containing leads and a base to which an unpackaged integrated circuit is attached. After encapsulation, the outer part of the frame is cut away and the leads are bent into the required shapes.

Lead Through-Hole (LTH)

A technique for populating circuit boards in which component leads are inserted into plated through-holes. Often abbreviated to "through-hole" or "thru-hole". When all of the components have been inserted, they are soldered to the board, usually using a wave soldering technique.

Level-Sensitive

An input whose effect on a function depends only on its current logic value or level, and is not directly related to it transitioning from one logic value to another.

LFSR

See Linear Feedback Shift Register.

Library

A library is a collection of one or more components or component dependencies (materials, symbols, footprints, or padstacks) stored in a container file. A library must be configured to a circuit before use, either by the user (manually) or by loading technology files (automatically). User libraries and Personal libraries are used to add foundry support, user defined models, and any custom set of components or simulation models. See the Library Overview topic for more information.

LIFO

See Last-In First-Out.

Limiting Level

The input power level when the output power is goes into compression and no longer becomes linear.

Line

Used to refer to the width of a track; for example, "This track has a line-width of 0.12mm."

Linear Feedback Shift Register (LFSR)

A shift register whose data input is generated as an XOR or XNOR of two or more elements in the register chain.

Linearity

Describes how closely an output signal is to a perfectly scaled multiple of a corresponding input signal.

Load Pull

Automated measurement of RF performance of a device under test (at a constant frequency) by varying the source and load impedance presented to the device

Logic Function

A mathematical function that performs a digital operation on digital data and returns a digital value.

Logic Gate

The physical implementation of a logic function.

Logic Synthesis

A process in which a program is used to optimize the logic used to implement a design.

Low-Fired Cofired

Similar in principle to standard cofired ceramic substrate techniques. However, low-fired cofired uses modern ceramic materials with compositions that allow them to be fired at temperatures as low as 650oC to 750oC. Firing at these temperatures in an inert atmosphere such as nitrogen allows non-refractory metals such as copper to be used to create tracks.

LSI

See Large-Scale Integration.

LTH

See Lead Through-Hole.

Glossary: M

 

Mask Programmable

A device such as a read-only memory which is programmed during its construction using a unique set of masks.

Maximal Displacement

A linear feedback shift register whose taps are selected such that changing a single bit in the input data stream will cause the maximum possible disruption to the register's contents.

Maximal Length

A linear feedback shift register that sequences through (2n - 1) states before returning to its original value.

Maxterm

The logical OR of the inverted variables associated with an input combination to a logical function.

MBE

See Molecular Beam Epitaxy.

MCM

See Multichip Module.

Medium-Scale Integration (MSI)

Refers to the number of logic gates in a device. By one convention, medium-scale integration represents a device containing 13 to 99 gates.

Meg

Unit qualifier (symbol = M) representing one million, or 106. For example, 3MHz stands for 3 x 106 Hertz.

Metallization Layer

A layer of conducting material on an integrated circuit that is selectively deposited or etched to form connections between logic gates. There may be several metallization layers separated by dielectric (insulating) layers.

Metal-Oxide Semiconductor (MOS)

A family of transistors where the controlling terminal is connected to a plate that is separated from the semiconduxtor by an insulating layer. This plate was originally made out metal (we now use polysilicon, or poly) and the insulator is an oxide -- hence the "metal-oxide" appellation.

Meta-Stable

A condition where the outputs of a logic function are oscillating uncontrollably between undefined values.

Micro

Unit qualifier (symbol = u) representing one millionth, or 10-6. For example, 3uS stands for 3 x 10-6 Seconds.

Microwave

The range in the electromagnetic spectrum from 300 MHz to 30 GHz (with corresponding wavelengths from 100 cm to 1 cm).

Microwire

A trade name for one incarnation of discrete wire technology. Microwire augments the main attributes of multiwire with laser-drilled blind vias, allowing these boards to support the maximum number of tracks and components.

Millman's method

The voltage on the ends of branches in parallel is equal to the sum of the currents flowing in every branch divided by the total equivalent conductance.

Minterm

The logical AND of the variables associated with an input combination to a logical function.

MMIC

Monolithic Microwave Integrated Circuit

Mod or Modulus

Refers to the number of states that a function such as a counter will pass through before returning to its original value. For example, a function that counts from 00002 to 11112 has a modulus of 16 and would be called a modulo-16 or mod-16 counter.

Molecular Beam Epitaxy (MBE)

A technique for creating thin films on substrates in precise patterns, in which the substrate is placed in a high vacuum, and a guided beam of ionized molecules is fired at it, effectively allowing molecular-thin layers to be "painted" onto the substrate where required.

MOS

See Metal-Oxide Semiconductor.

MOSFET

Metal-oxide semiconductor field-effect transistor.

MSI

See Medium-Scale Integration.

Multichip Module (MCM)

A generic name for a group of advanced interconnection and packaging technologies featuring unpackaged integrated circuits mounted directly onto a common substrate.

Multilayer

A printed circuit board constructed from a number of very thin single-sided and/or double-sided boards which are bonded together using a combination of temperature and pressure.

Multiplexer (digital)

A logic function that uses a binary value, or address, to select between a number of inputs and conveys the data from the selected input to the output.

Multiwire

A trade name for one incarnation of discrete wire technology.

Multizone

A stackup that contains zones or areas, each of which contains a subset of the layers in the stackup.

Mutual Capacitance

The capacitance between two conductors (one considered aggressor, the other victim) when all other conductors are connected together and then regarded as an ignored ground. It describes the amount of coupling due to the electric field. The mutual capacitance will inject an often undesired current into the victim line proportional to the rate of change of voltage on the aggressor line. Mutual Capacitance it a cause of crosstalk.

Mutual Inductance

The inductance between two conductors (one considered aggressor, the other victim) placed close enough that the magnetic field induced by a current flowing into the aggressor line encompasses the victim. The mutual inductance will inject an often undesired voltage noise onto the victim proportional to the rate of change of the current on the aggressor line.

Glossary: N

 

Nano

Unit qualifier (symbol = n) representing one thousandth of one millionth, or 10-9. For example, 3nS stands for 3 x 10-9 Seconds.

Nanobot

A molecular-sized robot (see Nanotechnology below)

Nanophase Materials

A form of matter which was only recently discovered, in which small clusters of atoms form the building blocks of a larger structure. These structures differ from those of naturally occurring crystals, in which individual atoms arrange themselves into a lattice.

Nanotechnology

Nanotechnology is an elusive term that is used by different research-and-development teams to refer to whatever it is that they're working on at the time. However, irrespective of their particular area of interest, nanotechnology always refers to something extremely small. One of the more exciting branches of nanotechnology that has been suggested as having potential in the future is that of micro-miniature electronic products that assemble themselves.

N-channel MOS (NMOS)

Refers to the order in which the semiconductor is doped in a MOS device. That is, which structures are constructed as N-type versus P-type material.

Negative-Edge

A transition from a logic 1 to a logic 0. Also known as a falling edge.

Negative Ion

An atom or group of atoms with an extra electron.

Negative Logic

A convention which dictates the relationship between logical values and the physical voltages used to represent them. The more negative potential is considered to represent TRUE and the more positive potential is considered to represent FALSE. Also known as negative true logic.

Negative Resist

A process where ultraviolet radiation passing through the transparent areas of a mask causes the resist to be cured. The uncured areas are then removed using an appropriate solvent.

Negative Signal Plane

A conducting layer in, or on, a substrate providing a grounding, or reference, point for components. There may be several negative signal planes separated by insulating layers.

Negative-True

A convention which dictates the relationship between logical values and the physical voltages used to represent them. The more negative potential is considered to represent TRUE and the more positive potential is considered to represent FALSE. Also known as negative logic.

Nibble

See Nybble.

NMOS

See N-channel MOS.

Noise Figure / Noise Factor

The Noise Factor of a transducer at a specified input frequency is the ratio of (a/b) where “a and b” are:

(a) the available Signal to Noise Ratio (SNR) at the signal generator terminals per unit bandwidth when the temperature of the input termination (generator or source) is 290 K and the bandwidth is limited by the transducer, to

(b) the available SNR per unit bandwidth at the output terminals of the transducer.

Traditionally:

Noise Figure NF = 10 log(noise factor F)

Noise Temperature (Te) = To(F - 1)

Where:

Noise Floor

This is defined as the lowest possible input to a chain or a component, that will produce a detectable output.

Noise Temperature

This is the amount of thermal noise in a chain or a component. Noise Factor and Noise Temperature (Te) are related as follows:

Noise Temperature (Te) = (F - 1)To

Where:

For example, a noise figure of 2.0 dB is equivalent to a Noise Temperature of 170 K.

Nominal Design

The original model on which Optimetrics analyses are based.

Non-Volatile

A memory device which does not lose its data when power is removed from the system.

Non-Volatile RAM

A device which is generally formed from an SRAM die mounted in a package with a very small battery, or as a mixture of SRAM and EEPROM cells fabricated on the same die.

Norton's theorem

Any two-terminal collection of voltage sources and resistors is electrically equivalent to an ideal current source in parallel with a single resistor.

NPN (N-type - P-type - N-type)

Refers to the order in which the semiconductor is doped in a bipolar junction transistor.

N-Port

An N-port component is typically characterized by network parameter data contained in the N-port itself in spreadsheet form or (more usually) by network parameter data contained in an external file.

N-type

A piece of semiconductor doped with impurities that make it amenable to donating electrons.

Nybble

A group of four binary digits, or bits (also called a nibble).

Glossary: O

 

Octal

Base-8 numbering system. Each octal digit can be directly mapped onto three binary digits, or bits.

Ohm

Unit of resistance. The Greek letter omega, *, is often used to represent ohms; for example, 1M* indicates one million ohms.

Ohm's law

The voltage across a resistor is the product of its resistance and the current flowing through it.

One-Hot Encoding

A form of state assignment for state machines in which each state is represented by an individual state variable.

One-Time Programmable

A device such as a PAL, PLA, or PROM that can only be programmed a single time and whose contents cannot be subsequently erased.

Optical Interconnect

The generic name for interconnection strategies based on opto-electronic systems, including fiber-optics, free-space, guided-wave, and holographic techniques.

Optical Lithography

A process in which radiation at optical wavelengths (usually in the ultraviolet range) is passed through a mask, and the resulting patterns are projected onto a layer of resist coating the substrate material.

Optical Mask

A sheet of material carrying patterns that are either transparent or opaque to the wavelengths used in an optical-lithographic process. Such a mask can carry hundreds of thousands of fine lines and geometric shapes.

Opto-Electronic

Refers to a system which combines optical and electronic components.

Organic Resist

A material which is used to coat a substrate and is then selectively cured to form an impervious layer. These materials are called organic because they are based on carbon compounds as are living creatures.

Organic Solvent

A solvent for organic materials such as those used to form organic resists.

Organic Substrate

Substrate materials such as FR4, in which woven glass fibers are bonded together with an epoxy. These materials are called organic because epoxies are based on carbon compounds as are living creatures.

Overglassing

One of the final stages in the integrated circuit fabrication process in which the entire surface of the wafer is coated with a layer of silicon dioxide or silicon nitride. This layer may also be referred to as the barrier layer or the passivation layer. An additional lithographic step is required to pattern holes in this layer to allow connections to be made to the pads.

Glossary: P

 

Package

Leaded assembly (inside of which one or more dies are mounted and connected) for use in larger circuits.

Pad

An area of metallization on a substrate used for probing or to connect to a via, plated through-hole, or an external interconnect.

Pad Grid Array (PGA)

A packaging technology in which a device's external connections are arranged as an array of conducting pads on the base of the package.

Padstack

Refers to any pads, anti-pads, and thermal relief pads associated with a via or a plated through-hole as it passes through the layers forming the substrate.

Padcap

A special flavor of circuit board used for high-reliability military applications. Distinguished by the fact that the outer surfaces of the board have pads but no tracks. Signal layers are only created on the inner planes, and tracks are connected to the surface pads by vias.

Parallel-In Serial-Out (PISO)

Refers to a shift register in which the data is loaded in parallel and read out serially.

Parasitic Effects

The effects caused by undesired resistance, capacitance, or inductance inherent in the material or topology of a track or component.

Passive Trimming

A process in which a laser beam is used to trim components such as thick-film and thin-film resistors on an otherwise unpopulated and unpowered hybrid or multichip module substrate. Probes are placed at each end of a component to monitor its value while the laser evaporates some of the material forming the component.

Pass-Transistor Logic

A technique for connecting MOS transistors such that data signals pass between their source and drain terminals. Pass-transistor logic minimizes the number of transistors required to implement a function, and is typically employed by designers of cell libraries or full-custom integrated circuits.

PGA

See either Pad Grid Array or Pin Grid Array.

Photo-Transistor

A special transistor which converts an optical input in the form of light into an equivalent electronic signal in the form of a voltage or current.

Pico

Unit qualifier (symbol = p) representing one millionth of one millionth, or 10-12. For example, 3pS stands for 3 x 10-12 Seconds.

PIN Diode

A diode where a thin layer exists between the N and P regions. Rectification with pin diodes is limited. They actually behave more like a variable resistor that changes based upon the DC bias.

Pin Grid Array (PGA)

A packaging technology in which a device's external connections are arranged as an array of conducting leads, or pins, on the base of the package.

PISO

See Parallel-In Serial-Out.

Place-Value

Refers to a numbering system in which the value of a particular digit depends both on the digit itself and its position in the number.

PlasmA gaseous state in which the atoms or molecules are dissociated to form ions.

Plated Through-Hole (PTH)

(1) A hole in a double-sided or multilayer board that is used to accommodate a through-hole component lead and is plated with copper.

(2) An alternative name for the lead through-hole technique for populating circuit boards in which component leads are inserted into plated through-holes.

PMOS (P-channel MOS)

Refers to the order in which the semiconductor is doped in a MOS device. That is, which structures are constructed as P-type versus N-type material.

PNP (P-type - N-type - P-type)

Refers to the order in which the semiconductor is doped in a bipolar junction transistor.

Polysilicon Layer

An internal layer in an integrated circuit used to create the gate electrodes of MOS transistors. In addition to forming gate electrodes, the polysilicon layer can also be used to interconnect components. There may be several polysilicon layers separated by dielectric (insulating) layers.

Populating

The act of attaching components to a substrate.

Positive Logic

A convention which dictates the relationship between logical values and the physical voltages used to represent them. The more positive potential is considered to represent TRUE and the more negative potential is considered to represent FALSE. Also known as positive true logic.

Positive Resist

A process where radiation passing through the transparent areas of a mask causes previously cured resist to be degraded. The degraded areas are then removed using an appropriate solvent.

Positive-Edge

A transition from a logic 0 to a logic 1. Also known as a rising edge.

Positive-True

A convention which dictates the relationship between logical values and the physical voltages used to represent them. The more positive potential is considered to represent TRUE and the more negative potential is considered to represent FALSE. Also known as positive logic.

Power Amplifier

A class of amplifier with the primary purpose of delivering high output power (usually accompanied by significant dissipated power).

Power Plane

A conducting layer in or on the substrate providing power to the components. There may be several power planes separated by insulating layers.

Prepreg

Non-conducting semi-cured layers of FR4 used to separate conducting layers in a multilayer circuit board.

Primitives

Simple logic functions such as BUF, NOT, AND, NAND, OR, NOR, XOR, and XNOR may be referred to as primitive logic gates or primitives.

Product Term

A set of literals linked by an AND operator.

Programmable Array Logic (PAL)

A programmable logic device in which the AND array is programmable but the OR array is pre-defined.

Programmable Logic Array (PLA)

The most user-configurable of the traditional programmable logic devices, because both the AND and OR arrays are programmable.

Programmable Logic Device (PLD)

The generic name for a device constructed in such a way that the designer can configure, or "program" it to perform a specific function.

Programmable Read-Only Memory (PROM)

A programmable logic device in which the OR array is programmable but the AND array is pre-defined. Usually considered to be a memory device whose contents can be electrically programmed (once) by the designer.

Project

A container that groups designs and their associated settings, including report definitions, in a file with a .adsn extension. To the fullest extent possible, projects are portable in that they include, rather than merely refer to, the library elements (graphical symbols, materials, footprints, and so on) of the components and models they contain. Multiple projects can be open simultaneously.

PROM

See Programmable Read-Only Memory.

Pseudo-Random

An artificial sequence of values that give the appearance of being random.

PTH

See Plated Through-Hole.

P-type

A piece of semiconductor doped with impurities that make it amenable to accepting electrons.

Pulling

The difference between the maximum frequency of a VCO when the phase angle of the load impedance reflection coefficient varies through 360 degrees.

Pulsed Radar

A transmit and receive system used for ranging and detection that transmits a train of short bursts of high microwave signals and receives return signals reflected from a target.

Pushing

The change in frequency when the supply voltage changes, expressed in MHz/V.

Glossary: Q

 

Q

Quality factor; a measure of stored energy/dissipated energy. Also a measure of bandwidth.

QAM

Quadrature amplitude modulation.

QFP

See Quad Flat Pack.

QPSK

Quadrature phase-shift keying.

Quad Flat Pack (QFP)

The most commonly used package in surface mount technology to achieve a high lead count in a small area. Leads are presented on all four sides of a thin square package.

Quinary

Base-5 numbering system.

Glossary: R

 

Radio Frequency (RF)

The range in the electromagnetic spectrum loosely defined from 30 MHz to 3 GHz (with corresponding wavelengths from 1000 cm to 10 cm).

Radix

Refers to the number of digits in a numbering system. For example, the decimal numbering system is said to be radix-10. May also be referred to as the "base".

Rats Layer

A non-physical, default layer in the stackup that displays a drawing of logical connections between different components, circuit elements, and net connections. A single connection is called a rat and all of the connections on a rat layers is a rat's nest.

Reed-Müller Logic

Logic functions implemented using only XOR and XNOR gates.

Refractory Metal

Metals such as tungsten, titanium, and molybdenum which are capable of withstanding extremely high, or refractory, temperatures.

Remotely Reconfigurable Hardware

A product whose function may be customized remotely, by telephone or radio, while remaining resident in the system (see also Configurable Hardware, Reconfigurable Hardware, Dynamically Reconfigurable Hardware, and Virtual Hardware).

Reflection

The appearance of a previously transmitted signal on the transmission line causing interference with the current signal. Reflections are caused by a poorly terminated or discontinuous transmission line, where the signal energy is not fully absorbed within the receiver and is therefore transmitted back toward the transmitter.

Resist

A material which is used to coat the substrate and is then selectively cured to form an impervious layer.

Resistor-Transistor Logic (RTL)

Logic gates implemented using particular configurations of resistors and bipolar junction transistors. For the majority of today's designers, resistor-transistor logic is of historical interest only.

Return Loss

Return Loss (dB) is defined as a ratio of the incoming signal to the same reflected signal as it enters a component.

Return Loss (dB) = 10 * LOG10(Reflected Power/Incident Power)

RF

See Radio Frequency.

RF Power

A class of engineering. Circuits and signals primarily concerned with power levels ranging from a few watts to tens of thousands of watts in the RF spectrum.

RF Power Transmitter

A discrete packaged transistor used in the amplification of RF power.

Rigid Flex

Hybrid constructions which combine standard rigid circuit boards with flexible printed circuits, thereby reducing the component count, weight, and susceptibility to vibration of the circuit, and greatly increasing its reliability.

Ringing

Common name for the waveform that is seen when a transmission line ends at a high impedance discontinuity. The signal first overshoots, then dips down below the target value, and continues this with decreasing amplitude until it converges on the target voltage.

Risetime

The time it takes for a signal to rise from 10% of its total logic swing to 90% of its total logic swing.

Rising-Edge

A transition from a logic 0 to a logic 1. Also known as a positive edge.

RTL

See Resistor-Transistor Logic.

Glossary: S

 

Sample Rate

Time increment of analysis. Sometimes referred to as sampling rate.

Sampling

The process of converting an analog signal into a series of digital values.

Scalar Notation

A notation in which each signal is assigned a unique name; for example, a3, a2, a1, and a0.

Scaling

A technique for making transistors switch faster by reducing their size. This strategy is known as scaling, because all of the transistors features are typically reduced by the same proportion.

Schematic

Common name for a circuit diagram.

Scrubbing

The process of vibrating two pieces of metal, or metal coated materials, at ultrasonic frequencies to create a friction weld.

Seed Value

An initial value loaded into a linear feedback shift register or random number generator.

Sensor

A transducer that detects a physical quantity and converts it into a form suitable for processing. For example, a microphone is a sensor which detects sound and converts it into a corresponding voltage or current.

Sequential

A function whose output value depends not only on its current input values, but also on previous input values. That is, the output value depends on a sequence of input values.

Side-Emitting Laser Diode

A laser diode constricted at the edge of an integrated circuit's substrate such that, when power is applied, the resulting laser beam is emitted horizontally; that is, parallel to the surface of the substrate.

Sign Bit

The most significant binary digit, or bit, of a signed binary number. If set to a logic 1, this bit represents a negative quantity.

Signal Conditioning

Amplifying, filtering, or otherwise processing a signal.

Signal Layer

A layer carrying tracks in a circuit board, hybrid, or multichip module. See also wiring layer.

Signature

Refers to the checksum value from a cyclic-redundancy-check when used in the guided-probe form of functional test.

Signature Analysis

A guided-probe functional-test technique based on signatures.

Signed Binary Number

A binary number in which the most-significant bit is used to represent a negative quantity. Thus, a signed binary number can be used to represent both positive and negative values.

Sign-Magnitude

Negative numbers in standard arithmetic are typically represented in sign-magnitude form by prefixing the value with a minus sign; for example, -27. For reasons of efficiency, computers rarely employ the sign-magnitude form. Instead, they use signed binary numbers to represent negative values.

Silicon Bumping

The process of depositing additional metallization on a die's pads to raise them fractionally above the level of the Barrier Layer.

Silicon Chip

Although a variety of semiconductor materials are available, the most commonly used is silicon and integrated circuits are popularly known as silicon chips, or simply chips.

Silicon Compiler

The program used in compiled cell technology to generate the masks used to create components and interconnections. May also be used to create data-path functions and memory functions.

Single-Sided

A printed circuit board with tracks on only one side.

Sintering

A process in which ultra-fine metal powders weld together at temperatures much lower than those required for larger pieces of the same materials.

SIPO (Serial-In Parallel-Out)

Refers to a shift register in which the data is loaded in serially and read out in parallel.

SISO (Serial-In Serial-Out)

Refers to a shift register in which the data is both loaded in and read out serially.

Skew

Time delay between different bits transmitted at the same time, measured at the receiver.

Skin Effect

In the case of high frequency signals, electrons are only conducted on the outer surface, or skin, of a conductor. This phenomenon is known as the skin effect.

Small-Scale Integration (SSI)

Refers to the number of logic gates in a device. By one convention, small-scale integration represents a device containing 1 to 12 gates.

SMD

See Surface Mount Device.

SMOBC

See Solder Mask Over Bare Copper.

SMT

See Surface Mount Technology.

SNR

Signal-to-noise ratio.

Soft Macro (Macro Function)

A logic function defined by the manufacturer of an application-specific integrated circuit. The function is described in terms of the simple functions provided in the cell library and connections between them. The assignment of cells to basic cells and the routing of the tracks is determined at the same time, and using the same tools, as for the other cells specified by the designer.

Solder Bumping

A flipped chip technique in which spheres of solder are formed on the die's pads. The die is flipped and the solder bumps are brought into contact with corresponding pads on the substrate. When all the chips have been mounted on the substrate, the solder bumps are melted using reflow soldering or vapor-phase soldering.

Solder Mask

A layer applied to the surface of the substrate that prevents solder from sticking to any metallization except where holes are patterned into the mask.

Solder Mask Over Bare Copper (SMOBC)

A technique in which the solder mask is applied in advance of the tin-lead plating. This results in lighter circuit boards because the tin-lead alloy is only used to plate the pads.

Solution

A solution is the successful result of an analysis, or imported results available for plotting.

Space

Used to refer to the width of the gap between adjacent tracks.

SPICE

Simulated Program for Integrated Circuit Emulation

SRAM

See Static RAM.

SS-CDMA

Spread-spectrum code-division multiple access.

SSI

See Small-Scale Integration.

Stackup

An arrangement of physical signal and dielectric layers that is used in the design of circuit boards. In Circuit, the stackup editor lists conceptual non-stackup layers with the physical stackup layers.

Standard Cell

An application-specific integrated circuit which, unlike a gate array, does not use the concept of a basic cell and does not have any pre-fabricated components. The manufacturer creates custom masks for every stage of the device's fabrication allowing each logic function to be created using the minimum number of transistors.

State Assignment

The process by which the states in a state machine are assigned to the binary patterns that are to be stored in the state variables.

State Diagram

A graphical representation of the operation of a state machine.

State Machine

The actual implementation (in hardware or software) of a function that can be considered to consist of a set of states through which it sequences.

State Table

A tabular representation of the operation of a state machine. Similar to a truth table, but also includes the current state as an input and the next state as an output.

State Transition

An arc connecting two states in a state diagram.

State Variable

One of a set of registers whose values represent the current state occupied by a state Static Flex.

Statement

A sentence that asserts or denies an attribute about an object or group of objects.

Static Flex

A type of flexible printed circuit which can be manipulated into permanent three-dimensional shapes for applications such as calculators and high-tech cameras which require efficient use of volume and not just area.

Static RAM (SRAM)

A memory device in which each cell is formed from four or six transistors configured as a latch or a flip-flop. The term static is used because, once a value has been loaded into an SRAM cell, it will remain unchanged until it is explicitly altered or until power is removed from the device.

Steady State

A condition in which nothing is changing or happening.

Subatomic Erosion

A process in which structures on an integrated circuit's substrate are eroded by the flow of electrons in much the same way as land is eroded by a river (also known as electromigration)

Substrate

Generic name for the base layer of an integrated circuit, hybrid, multichip module, or circuit board. Substrates may be formed from a wide variety of materials, including semiconductors, ceramics, FR4 (fiberglass), glass, sapphire, or diamond depending on the application. Note that the term substrate has traditionally not been widely used in the circuit board world, at least not by the people who manufacture the boards. However, there is an increasing tendency to refer to a circuit board as a substrate by the people who populate the boards. The main reason for this is that circuit boards are often used as substrates in hybrids and multichip modules, and there is a trend toward a standard terminology across all forms of interconnection technology.

Subtractive Process

A process in which a substrate is first covered with conducting material, then any unwanted material is subsequently removed, or subtracted.

Superconductor

A material with zero resistance to the flow of electric current.

Surface Mount Device (SMD)

A component whose packaging is designed for use with surface mount technology.

Surface Mount Technology (SMT)

A technique for populating hybrids, multichip modules, and circuit boards, in which packaged components are mounted directly onto the surface of the substrate. A layer of solder paste is screen printed onto the pads and the components are attached by pushing their leads into the paste. When all of the components have been attached, the solder paste is melted using either reflow soldering or vapor-phase soldering.

Surface-Emitting Laser Diode

A laser diode constricted on an integrated circuit's substrate such that, when power is applied, the resulting laser beam is emitted directly away from the surface of the substrate.

Sweep Definition

Also called variable sweep definition. A set of variable values within a range that Optimetrics drives the Electronics Desktop to solve when a parametric setup is analyzed. A parametric setup can include one or more sweep definitions.

Synchronous

(1)A signal whose data is not acknowledged or acted upon until the next active edge of a clock signal. (2)A system whose operation is synchronized by a clock signal.

System Gain

The net loss of a system as a measure of reliability with respect to system parameters. It measures the difference between the output power and minimum input power required for satisfactory performance. It represents a system net loss, and is represented as a negative dB value that is larger than or equal to the summed gains and losses of a signal propagating in a system from transmitter to receiver.

 

Glossary: T

 

Tap

A register output which is used to generate the next data input to a linear feedback shift register.

Tape Automated Bonding (TAB)

A process in which transparent flexible tape has tracks created on its surface. The pads on unpackaged integrated circuits are attached to corresponding pads on the tape which is then stored in a reel. Silver-loaded epoxy is screen printed on the substrate at the site where the device is to be located and onto the pads to which the device's leads are to be connected. The reel of TAB tape is fed through an automatic machine which pushes the device and the TAB leads into the epoxy. When the silver-loaded epoxy is cured using reflow soldering or vapor-phase soldering, it forms electrical connections between the TAB leads and the pads on the substrate.

TDM

Time-division multiplexing.

TDMA

Time-division multiple access.

Technology File

A technology file is a collection of information, specifiable by name at design-creation time using the Choose Layout Technology dialog box, that specifies material stackup properties for layout, substrates for simulation, and component libraries for design creation. A technology (.asty) file may be saved from the current project via the File menu. A technology file initializes a design with a set of data to avoid repeated entry of commonly used data. This data can consist of layers and stackup information for layout, configured libraries of components, and substrate definition(s) for circuit analysis. Users and foundries can customize Technology files for their own manufacturing process and simulation models.

Tertiary Logic

An experimental technology in which logic gates are based on three distinct voltage levels. The three voltages are used to represent the tertiary digits 0, 1, and 2, and their logical equivalents FALSE, TRUE, and MAYBE.

Thermal Impedance

Relates the temperature rise for a given dissipated power (which employs an analogy to the voltage-current relationship of impedance).

Thermal Relief Pad

A special pattern etched around a via or a plated through-hole to connect it into a power or ground plane. A thermal relief pad is necessary to prevent too much heat being absorbed into the power or ground plane when the board is being soldered.

Thermal Tracking

Typically used to refer to the problems associated with optical interconnection systems whose alignment may be disturbed by changes in temperature.

Thevenin's theorem

Any two-terminal combination of voltage sources and resistors is electrically equivalent to a single voltage source in series with a single resistor.

Thick-Film Process

A process used in the manufacture of hybrids and, to a lesser extent, multichip modules in which signal and dielectric (insulating) layers are screen-printed onto the substrate.

Thin-Film Process

A process used in the manufacture of hybrids and multichip modules in which signal layers and dielectric (insulating) layers are created using opto-lithographic techniques.

Time-Of-Flight

The time taken for a signal to propagate from one logic gate or opto-electronic component to another.

Tin-Lead Plating

An electroless plating process in which exposed areas of copper on a circuit board are coated with a layer of tin-lead alloy. The alloy is used to prevent the copper from oxidizing and provides protection against contamination.

Tinning

An abbreviation of tin-lead plating, which is an electroless plating process in which exposed areas of copper on a circuit board are coated with a layer of tin-lead alloy. The alloy is used to prevent the copper from oxidizing and provides protection against contamination.

Toggle

Refers to the contents or outputs of a logic function switching to the inverse of their previous logic values.

TOI

Third-order intercept point.

Total Voltage

Total voltage = Incident voltage + reflected voltage, that is VT = Va + Vb.

Trace

A conducting connection between electronic components. May also be called a track or a signal. In the case of integrated circuits, such interconnections are often referred to collectively as metallization.

Tracks

A conducting connection between electronic components. May also be called a trace or a signal. In the case of integrated circuits, such interconnections are often referred to collectively as metallization.

Transducer

A device that converts input energy of one form into output energy of another.

Transistor

A three-terminal semiconductor device that, in the digital world, can be considered to operate like a switch.

Tri-State Function

A function whose output can adopt three states: 0, 1, and Z (high-impedance) The function does not drive any value in the Z state and, in many respects, may be considered to be disconnected from the rest of the circuit.

Truth Table

A convenient way to represent the operation of a digital circuit as columns of input values and their corresponding output responses.

TTL (Transistor-Transistor Logic)

Logic gates implemented using particular configurations of bipolar junction transistors.

Glossary: U

 

ULA

See Uncommitted Logic Array.

Ultra-Large-Scale Integration (ULSI)

Refers to the number of logic gates in a device. By one convention, ultra-large-scale integration represents a device containing a million or more gates.

ULSI

See Ultra-Large-Scale Integration.

Uncommitted Logic Array (ULA)

One of the original names used to refer to gate array devices. This term has largely fallen into disuse.

Unsigned Binary Number

A binary number in which all the bits are used to represent positive quantities. Thus, an unsigned binary number can only be used to represent positive values.

Undershoot

The percentage a waveform falls below its lowest determined value before setting at the correct value.

Glossary: V

 

Vapor-Phase Soldering

A surface mount process in which a substrate carrying components attached by solder paste is lowered into the vapor-cloud of a tank containing boiling hydrocarbons. This melts the solder paste thereby forming good electrical connections. However, vapor-phase soldering is becoming increasingly less popular due to environmental concerns.

Vaporware

Refers to either hardware or software that exist only in the minds of the people who are trying to sell them to you.

Variable Sweep Definition

Also called sweep definition. A set of variable values within a range that Optimetrics drives HFSS or Q3D to solve when a parametric setup is analyzed. A parametric setup can include one or more sweep definitions.

Vector Notation

A notation used in logic simulation and synthesis in which a single name is used to reference a group of signals, and individual signals within the group are referenced by means of an index; for example, a[3:0] = a[3], a[2], a[1], and a[0].

Very-Large-Scale Integration (VLSI)

Refers to the number of logic gates in a device. By one convention, very-large-scale integration represents a device containing 1,000 to 999,999 gates.

Via

A hole filled or lined with a conducting material which is used to link two or more conducting layers in a substrate.

Virtual Hardware or Virtual Logic

An extension of dynamically configurable hardware based on a new generation of FPGAs which were introduced around the beginning of 1994. In addition to supporting the dynamic reconfiguration of selected portions of the internal logic, these devices also feature: no disruption to the device's inputs and outputs; no disruption to the system-level clocking; the continued operation of any portions of the device that are not undergoing reconfiguration; and no disruption to the contents of internal registers during reconfiguration, even in the area being reconfigured (see also Configurable Hardware, Reconfigurable Hardware, Remotely Reconfigurable Hardware, and Dynamically Reconfigurable Hardware).

Virtual Memory

A trick used by a computer's operating system to pretend that it has access to more memory than is actually available. For example, a program running on the computer may require ten mega-bytes to store its data, but the computer may have only five mega-bytes of memory available. To get around this problem, whenever the program attempts to access a memory location that does not physically exist, the operating system performs a slight-of-hand and exchanges some of the contents in the memory with data on the hard disk.

VLSI

See Very-Large-Scale Integration.

Volatile

Refers to a memory device which loses any data it contains when power is removed from the system; for example, random-access memory in the form of SRAM or DRAM

Glossary: W

 

Wafer Probing

The process of testing individual integrated circuits while they still form part of a wafer. An automated tester places probes on the device's pads, applies power to the power pads, injects a series of signals into the input pads, and monitors the corresponding signals returned from the output pads.

Wave Soldering

A process used to solder circuit boards populated with through-hole components. A wave generating mechanism maintains a wave of hot, liquid solder traveling back and forth across the surface of a tank. The populated circuit boards are passed over the wave soldering machine on a conveyor belt. The velocity of the convener belt is carefully controlled and synchronized such that the solder wave brushes across the bottom of the board only once.

Waveguide

A transparent path bounded by non-transparent, reflective areas, which is fabricated directly onto the surface of a substrate. Used in the optical interconnection strategy known as guided-wave.

W-CDMA

Wideband code-division multiple access. Typically defined with 5 MHz channels and 3.84 MHz carrier signals.

Wire Bonding

The process of connecting the pads on an unpackaged integrated circuit to corresponding pads on a substrate using wires that are finer than a human hair. Wire bonding may also be used to connect the pads on an unpackaged integrated circuit, hybrid, or multichip module to the leads of the component package.

Wiring Layer

A layer carrying wires in a discrete wired board. See also signal layer.

Word

A group of signals or logic functions performing a common task and carrying or storing similar data; for example, a value on the data bus could be referred to as a data word.

Glossary: X

 

X-Ray Lithography

Similar in principle to optical lithography, but capable of constructing much finer features due to the shorter wavelengths involved. However, X-ray lithography requires an intense source of X-rays, is more difficult to use, and is considerably more expensive than optical lithography.

Glossary: Y

 

Yield

The number of devices that work as planned, specified as a percentage of the total number actually fabricated.

Glossary: Z

 

Zepto (z)

The symbol used to represent the high-impedance state in tri-state logic.

Zone

A spatial area on a printed circuit board that may contain a subset or all of the layers in the board’s stackup.