Subcircuits with Independent Stackups

Subcircuits can be pasted into an HFSS 3D Layout design as an instance of the original, with an independent stackup. The vertical placement of the sub-design is determined by the placement layer of the cell instance:

Select the sub-design in the layout editor (without pushing down into it).
Set the placement layer use the “PlacementLayer” attribute.

The HFSS 3D Layout ignores sub-designs with independent stackups during analysis; a warning is issued.
For HFSS, a consistent mesh that includes all sub-designs is constructed. If negative signal layers intersect, the mesh fails to generate.
HFSS 3D Layout attributes in the black-boxes is ignored (e.g., boundary conditions).
Ports must be added at the analysis level; ports internal to any sub-design is ignored.
Ports can be referenced to negative signals or metal on a signal layer in the sub-design containing the physical port location or any parent design.

Note:

The stackup cannot be inverted; the lower elevation of the black-box stackup is always aligned with the top of the placement layer.
The entire combined geometry is simulated by HFSS; any existing results for the independent sub-design are not re-used.