The digital output nodes of receivers provide a waveform that switches between 0V and 1V. These transitions depend on the input signal, the values of Vinl, Vinh, and Polarity set in the IBIS model file, and the following criteria:
- If the output is in the low state (0V) and the input signal becomes greater than Vinh, the output transitions to high (1V).
- If the output state is high (1V) and the input signal becomes less than Vinl, the output transitions to low (0V).
- For initial transient values, and for DC analysis, the buffers use a single fixed threshold equal to the average of Vinl and Vinh, [(Vinh + Vinl)/2]. If the input signal is above this threshold, the output is placed in the high state (1V). Otherwise, the output is placed in the low state (0V).
These descriptions of the relationships between input voltage and output state for the Output buffer nodes assume the Polarity parameter in the IBIS model is set to Non-Inverting. The relationships are appropriately inverted if the IBIS buffer model has Polarity defined as Inverting.